DDS Board testing



I mentioned that I was building a DDS (Direct Digital Synthesis) board for work. Here’s the result:


2013-04-11 09.34.43


Yes that’s a giant block of aluminum that it’s attached to. It keeps the board from sliding around with all those cables attached to it.

It seems to work quite well. The first thing I tested was the bandpass filter. I designed it to have a center of 100 MHz and a bandwidth of 80 MHz. What do you know? Sometimes things work out:



That looks pretty decent to me, but I’m not an RF expert.

Now a chart of the output with the MMIC fully powered up. The AD9852 is being clocked at 260 MHz instead of the desired 300 MHz (for a reason I’ll describe below.) The AD9852 is programmed to output a fundamental frequency of 100 MHz in this test.



I thought I had a screen shot zoomed in on the 100 MHz peak, alas I do not. The noise floor when zoomed in is much better than the spectrum analyzer shows in the above plot (I promise.)

I had to run the AD9852 at 260 MHz carrier instead of 300 MHz because the LMK03001C chip I am using cannot output a 300 MHz clock, given a frequency of 20 MHz. The PLL configuration for the LMK03001C is very flexible, just not quite enough for this. For the next board I am switching to the LMK03000C which has a slightly different VCO. It’ll work.

This synthesizer was a test for my next big project: a huge VME bus board that has 4 AD9852 channels on it. I’m proud to say that this test succeeded.